Design of an 8-wide superscalar RISC microprocessor with simultaneous multithreading

R.P. Preston, R.W. Badeau, Dan Bailey, Shane Bell, Larry Biro, William J. Bowhill, D.E. Dever, S. Felix, R. Gammack, V. Germini,

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) · 2005 · 68 citations · 2 references

Concepts

Abstract

A 250M transistor microprocessor implements the Alpha instruction set and features 8-wide superscalar issue and simultaneous multithreading in a 0.125/spl mu/m SOI process. Performance is estimated at over three times that of the previous design.

References

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