Instruction Set Microarchitecture is a microarchitectural design framework that defines the implementation-specific organization and operational mechanisms through which an instruction set architecture is realized in hardware, including the datapath, control logic, and execution units that determine how instructions are fetched, decoded, executed, and retired.
253
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12.3K
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744
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195
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Publications per year
2017–2026
19
Parents
Publications
253
Reduced instruction set computers
David A. Patterson · Communications of the ACM · 1985 · 451 citations · Full text
Scaling to the end of silicon with EDGE architectures
Doug Burger, Stephen W. Keckler, Kathryn S. McKinley et al. · Computer · 2004 · 354 citations
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Authors
744
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1–5 of 744
Institutions
195
University of California, Berkeley
Berkeley, United States
13 h-index
24 publications
2.1K citations
Intel (United States)
Santa Clara, United States
11 h-index
22 publications
1.4K citations
Digital Wave (United States)
Centennial, United States
10 h-index
28 publications
712 citations
Carnegie Mellon University
Pittsburgh, United States
9 h-index
21 publications
866 citations
Stanford University
Stanford, United States
6 h-index
13 publications
1.1K citations
Intel (United Kingdom)
Swindon, United Kingdom
6 h-index
15 publications
2.1K citations
IBM Research - Thomas J. Watson Research Center
Yorktown Heights, United States
6 h-index
15 publications
871 citations
Hewlett-Packard (United States)
Palo Alto, United States
5 h-index
13 publications
2.1K citations
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Venues
- IEEE Micro
13 publications · 756 citations
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- Computer
12 publications · 762 citations
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- IEEE Transactions on Computers
11 publications · 886 citations
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- ACM SIGARCH Computer Architecture News
7 publications · 250 citations
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- IEEE Journal of Solid-State Circuits
6 publications · 302 citations
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