Multithreading Microarchitecture

Multithreading Microarchitecture is a microarchitectural design paradigm that enables a single processor core to execute instructions from multiple threads concurrently, thereby improving instruction-level parallelism and resource utilization by sharing execution resources across threads at the hardware level.

251

Publications

17.4K

Citations

639

Authors

139

Institutions

Publications per year

2017–2026

9

Authors

639

  1. DM
    Dean M. Tullsen

    University of California San Diego, United States

    25 publications · 4.5K citations

    23

    h-index

  2. YN
    Yale N. Patt

    The University of Texas at Austin, United States

    12 publications · 826 citations

    12

    h-index

  3. SJ
    Susan J. Eggers

    University of Washington, United States

    9 publications · 3.5K citations

    9

    h-index

  4. HM
    Henry M. Levy

    University of Washington, United States

    9 publications · 3.5K citations

    9

    h-index

  5. WJ
    William J. Dally

    Stanford University, United States

    8 publications · 624 citations

    8

    h-index

1–5 of 639

Venues

  1. IEEE Micro

    14 publications · 1.3K citations

    13

    h-index

  2. ACM SIGARCH Computer Architecture News

    14 publications · 1K citations

    12

    h-index

  3. IBM Journal of Research and Development

    6 publications · 734 citations

    6

    h-index

  4. IEEE Transactions on Computers

    5 publications · 254 citations

    5

    h-index

  5. IEEE Computer Architecture Letters

    4 publications · 89 citations

    4

    h-index

1–5