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Ultra high voltage (>12 kV), high performance 4H-SiC IGBTs
71
Citations
2
References
2012
Year
Unknown Venue
Buffer Layer DesignElectrical EngineeringChip SizeEngineeringSemiconductor DeviceHigh Voltage EngineeringPower DeviceApplied PhysicsPower Semiconductor DeviceGate BiasUltra High VoltagePower SemiconductorsPower ElectronicsMicroelectronicsPower Electronic Devices
We present our latest developments in ultra high voltage 4H-SiC IGBTs. A 4H-SiC P-IGBT, with a chip size of 6.7 mm × 6.7 mm and an active area of 0.16 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> exhibited a record high blocking voltage of 15 kV, while showing a room temperature differential specific on-resistance of 24 mΩ-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with a gate bias of -20 V. A 4H-SiC N-IGBT with the same area showed a blocking voltage of 12.5 kV, and demonstrated a room temperature differential specific on-resistance of 5.3 mΩ-cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with a gate bias of 20 V. Buffer layer design, which includes controlling the doping concentration and the thickness of the field-stop buffer layers, was used to control the charge injection from the backside. Effects on buffer layer design on static characteristics and switching behavior are reported.
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