Residual Stress Analysis in Thin Device Wafer Using Piezoresistive Stress Sensor

Abstract

In this paper, piezoresistive stress sensors have been used to analyze the residual stress in thin device wafers. For the analysis, device wafers having piezoresistive stress sensors were fabricated. The stress sensors were then calibrated to determine the piezoresistive coefficients. The analysis of residual stress in device wafers was carried out after thinning the device wafers to three different thicknesses ranging from 400 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex> </formula> to 100 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu{\rm m}$</tex></formula> . The thinning process was performed with the help of commercial wafer back-grinding machine and the complete thinning process included rough grinding, then fine grinding, and finally chemical-mechanical polishing. It was found that wafer back-grinding of device wafers generates a large amount of compressive stress at the surface of the device wafers and the amount of stress increases exponentially with the decrease in wafer thickness. The stress was also measured after mounting the thin device wafers on dicing tape. It was found that the mounting on dicing tape generates tensile stress at the device wafer surface. These trends of stress in the thin device wafers were confirmed with the bending profile of the wafers. A detailed explanation for the development of stresses in the thin device wafer is provided in this paper.