Fast erasing and highly reliable MONOS type memory with HfO2 high-k trapping layer and Si3N4/SiO2 tunneling stack

Abstract

A Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> /SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> double-tunneling layer is incorporated in a MONOS memory device structure with high-k HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> charge storage layer for NAND-type memory application. Fast erasure of charges trapped in the high-k layer is enabled by enhanced hole current, accomplishing a large memory window of 2.9 V with electrical stress at 17.5 V for 100 (as and at -18 V for 5 ms. Incorporation of 1.6-1.8 nm thick Si <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> N <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> in place of a part of the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> tunneling layer resulted in fast program and erase (P/E) speed and small V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> shift over 104 endurance cycles