An analysis of interconnect delay minimization by low-voltage repeater insertion

Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas

T. Sakurai, A. Richard Newton · IEEE Journal of Solid-State Circuits · 1990 · 1.7K citations

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New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation

Yu Cao, Takashi Satō, Michael Orshansky et al. · 2002 · 510 citations

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Optimal interconnection circuits for VLSI

H. B. Bakoglu, J.D. Meindl · IEEE Transactions on Electron Devices · 1985 · 435 citations

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Effects of inductance on the propagation delay and repeater insertion in VLSI circuits

Yehea Ismail, Eby G. Friedman · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2000 · 393 citations

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A power-optimal repeater insertion methodology for global interconnects in nanometer designs

Kaustav Banerjee, A. Mehrotra · IEEE Transactions on Electron Devices · 2002 · 340 citations

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