Interconnect Delay Optimization

Interconnect Delay Optimization is a design methodology in integrated circuit engineering that specifically addresses the reduction of signal propagation delays in on-chip interconnects through strategic manipulation of physical and electrical parameters, distinguishing it from broader performance enhancement techniques by its focused intent on interconnect-induced latency.

279

Publications

12K

Citations

704

Authors

175

Institutions

Publications per year

2017–2026

Parents

Interconnect Design

Publications

279

Closed-form expressions for interconnection delay, coupling, and crosstalk in VLSIs

T. Sakurai · IEEE Transactions on Electron Devices · 1993 · 603 citations

Engineering, Computer Engineering, Electrical Engineering +17

Interconnect scaling-the real limiter to high performance ULSI

M. Bohr · 2002 · 549 citations

Engineering, Electrical Engineering, Materials Science +17

3-D Topologies for Networks-on-Chip

Vasilis F. Pavlidis, Eby G. Friedman · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2007 · 394 citations

Computing, Computer Engineering, Computer Science +17

Directional and single-driver wires in FPGA interconnect

Guy Lemieux, E. Lee, Marvin Tom et al. · 2005 · 242 citations

Engineering, Computer Engineering, Electrical Engineering +17

Chain: a delay-insensitive chip area interconnect

John Bainbridge, Steve Furber · IEEE Micro · 2002 · 225 citations

Engineering, Computer Engineering, Electrical Engineering +14

1–5 of 279

Authors

704

EG
Eby G. Friedman
University of Rochester, United States
9 publications · 591 citations
9
h-index
AB
Andrew B. Kahng
University of California San Diego, United States
8 publications · 473 citations
8
h-index
SS
Sachin S. Sapatnekar
University of Minnesota, United States
8 publications · 330 citations
8
h-index
JC
Jason Cong
University of California, Los Angeles, United States
7 publications · 626 citations
7
h-index
CJ
Charles J. Alpert
IBM Research - Austin, United States
7 publications · 384 citations
7
h-index

1–5 of 704

Institutions

175

1–8 of 175

Venues

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
25 publications · 1.2K citations
16
h-index
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
11 publications · 886 citations
10
h-index
IEEE Transactions on Electron Devices
8 publications · 872 citations
8
h-index
IEEE Journal of Solid-State Circuits
5 publications · 118 citations
5
h-index
Microelectronics Journal
4 publications · 69 citations
4
h-index

1–5