Steve Furber - Concepedia

Author

Steve Furber

Also Known As

Deco, Gustavo, Furber Stephen, Furber Steve, Furber, Stephen, Furber, Stephen B., Furber, Steve, Lenz, Gregor, S B Furber, S FURBER, S Furber

364

Publications

11.7K

Citations

H-Index

225

Concepts

All Affiliations

University of Manchester

About

Steve Furber is an author at University of Manchester specializing in engineering, computer engineering, and computer architecture.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	43	117	5.9K
2	Education	2	2	55
3	Health Sciences	2	2	62
4	Medicine	2	2	57
5	Arts	1	1	10

Steve Furber

149

Publications

8.5K

Citations

H-Index

Page 1

	Year	Citations
The SpiNNaker Project Steve Furber, Francesco Galluppi, Steve Temple, Proceedings of the IEEE	2014	1.3K
Overview of the SpiNNaker System Architecture Steve Furber, David Lester, Luis A. Plana, IEEE Transactions on Computers EngineeringMeaningful ComputationsSpin SystemsMemory CoherenceMagnetic Resonance	2012	632
SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation Eustace Painkras, Luis A. Plana, Jim Garside, IEEE Journal of Solid-State Circuits EngineeringComputer ArchitectureSupercomputer ArchitectureHardware SystemsSocial Sciences	2013	499
SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor Muhammad Mukaram Khan, David Lester, Luis A. Plana, EngineeringNeural Networks (Machine Learning)Computer ArchitectureMapping Neural NetworksHardware Systems	2008	268
Chain: a delay-insensitive chip area interconnect John Bainbridge, Steve Furber IEEE Micro EngineeringComputer ArchitectureProcessor ArchitectureInterconnect (Integrated Circuits)Hardware Architecture	2002	224
Four-phase micropipeline latch control circuits Steve Furber, P. Day IEEE Transactions on Very Large Scale Integration (VLSI) Systems Circuit SystemStandard MicropipelinesMixed-signal Integrated CircuitComputer EngineeringFour-phase Micropipeline Control	1996	222
Performance Comparison of the Digital Neuromorphic Hardware SpiNNaker and the Neural Network Simulation Software NEST for a Full-Scale Cortical Microcircuit Model Sacha J. van Albada, Andrew Rowley, Johanna Senk, Frontiers in Neuroscience NeurochipNest SoftwareEngineeringComputational NeuroscienceComputer Engineering	2018	150
A GALS Infrastructure for a Massively Parallel Multiprocessor Luis A. Plana, Steve Furber, Steve Temple, IEEE Design & Test of Computers Cluster ComputingMassively-parallel ComputingEngineeringParallel SoftwareHigh-performance Architecture	2007	121
Comparison of Artificial and Spiking Neural Networks on Digital Hardware Simon Davidson, Steve Furber Frontiers in Neuroscience	2021	109
Delay insensitive system-on-chip interconnect using 1-of-4 data encoding W.J. Bainbridge, Steve Furber System On ChipElectrical EngineeringEngineeringMarble Soc BusHigh-performance Architecture	2002	104

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