IEEE Transactions on Components Hybrids and Manufacturing Technology · 1987 · 29 citations · 5 references
EngineeringElectrical Engineering3D ModelingComputer-aided DesignPackaging DesignChip PackagingIntegrated Circuit DesignPackage DesignPackaging EngineeringVery-large-scale Integration Layout3D Integrated CircuitsConnectorsPackage ModelingThree-dimensional Integrated Circuit LayoutWire Sizing
Equations for estimating wire lengths in various types of two-dimensional (2-D) and three-dimensional (3-D) cell arrays are introduced'and applications of these equations are described. The singleplane packaging technique is compared with the stacked 2-D technique. The effect of increasing the number of edge connectors for Stacked 2-D designs is evaluated. Also the wire length in 3-D wafer computers is estimated.
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Grinberg, Nudd, Etchells · Computer · 1984 · 60 citations
Engineering, Computer Engineering, Electrical Engineering +12