Fabrication of Application Specific Integrated Passive Devices Using Wafer Level Packaging Technologies

TLDR

Integrated passives, especially those fabricated via wafer‑level packaging, are increasingly popular because they combine multiple passive components into a single subcomponent, reducing size and assembly costs for SiP systems. This paper discusses the wafer‑level thin‑film fabrication of integrated passive devices (WL‑IPDs). The authors present two fabricated WL‑IPDs, describing their design and technological realization, and discuss their electrical characterization. Electrical characterization results demonstrate the viability of the fabricated WL‑IPDs for integrated passive applications.

Abstract

Integrated passives have become increasingly popular in recent years. Especially wafer level packaging technologies offer an interesting variety of different possibilities for the implementation of integrated passive components. In this context, particularly the fabrication of integrated passive devices (IPDs) represents a promising solution regarding the reduction of size and assembly costs of electronic systems in package (SiP). IPDs combine different passive components (R,L ,C ) in one subcomponent to be assembled in one step by standard technologies like surface mount device (SMD) or flip chip. In this paper, the wafer level thin film fabrication of integrated passive devices (WL-IPDs) will be discussed. After a brief overview of the different possibilities for the realization of IPDs using wafer level packaging technologies two fabricated WL-IPDs will be presented. Design, technological realization, as well as results from the electrical characterization will be discussed.