An investigation of a molybdenum gate for submicrometer CMOS

Robert Kwasnick, E.B. Kaminsky, Peter Frank, G.A. Franz, R. Saia, K. J. Polasko, T.B. Gorczya

IEEE Transactions on Electron Devices · 1988 · 13 citations · 11 references

Concepts

Abstract

Processing issues including Mo deposition, gate etching, ion implant channeling, and integration of a Mo gate with high-temperature processing are discussed. Methods for addressing these issues are described. A 0.8- mu n Mo-gate CMOS process incorporating these methods has been developed. Submicrometer Mo-gate NMOS and PMOS devices and 0.8- mu m CMOS ring oscillator results are presented. The high performance of these devices and circuits demonstrates the potential of a Mo gate.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

References

11