IEEE Electron Device Letters · 1984 · 25 citations · 6 references
EngineeringElectrical EngineeringMaterials ScienceElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice CharacterizationDevice ScalingHigh-frequency Semiconductor DevicesImplant TechnologyIon ImplantationP-n JunctionsGainIon Implantation EffectsPower Mosfets
This letter reports on the fabrication and performance of planar all ion-implanted 1.0-µm gate length InP power junction field effect transistors (JFET's). The devices were fabricated utilizing n+ implantation, a AuZn/TiW/Au gate metallization, and an n+ drain ledge. At 4.5 GHz, the 300-µm gate width JFET's exhibited maximum insertion gains of up to 13 dB and scaled output powers as high as 1 W/mm with 3-dB gain.
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M. Armand, Dinh-Mao Bui, Joël Chevrier et al. · Electronics Letters · 1983 · 27 citations
Fully ion implanted InP junction FET's
J.B. Boos, H.B. Dietrich, Tianqi Weng et al. · IEEE Electron Device Letters · 1982 · 15 citations