From MFM Capacitors Toward Ferroelectric Transistors: Endurance and Disturb Characteristics of ${\rm HfO}_{2}$-Based FeFET Devices

Abstract

Ferroelectric Si:HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> has been investigated starting from metal-ferroelectric-metal (MFM) capacitors over metal-ferroelectric-insulator-semiconductor (MFIS) and finally ferroelectric field-effect-transistor (FeFET) devices. Endurance characteristics and field cycling effects recognized for the material itself are shown to also translate to highly scaled 30-nm FeFET devices. Positive-up negative-down as well as pulsed I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> -V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> measurements illustrate how ferroelectric material characteristics of MFM capacitors can also be identified in more complex MFIS and FeFET structures. Antiferroelectric-like characteristics observed for relatively high Si dopant concentration reveal significant trapping superimposed onto the ferroelectric memory window limiting the general program/erase endurance of the devices to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> cycles. In addition, worst case disturb scenarios for a VDD/2 and VDD/3 scheme are evaluated to prove the viability of one-transistor memory cell concepts. The ability to tailor the ferroelectric properties by appropriate dopant concentration reveals disturb resilience up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> disturb cycles while maintaining an I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> to I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of more than four orders of magnitude.