Journal of Electronic Testing · 2007 · 20 citations · 10 references
EngineeringComputer EngineeringElectrical EngineeringFault-tolerant SystemsMicroelectronicsSystem-on-chip DesignBuilt-in Self-testDesign For TestabilityHardware Modeling For Digital SystemsInterconnect ArchitectureInterconnect DesignSignal IntegrityHardware Fault ModelsInterconnect Fault AnalysisInterconnect Modeling
10
Fault modeling and simulation for crosstalk in system-on-chip interconnects
Michael Cuviello, S. Dey, Xiaoliang Bai et al. · 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) · 2003 · 162 citations
Engineering, Computer Engineering, Electrical Engineering +17