Publication | Closed Access
Tall triple-gate devices with TiN/HfO/sub 2/ gate stack
48
Citations
4
References
2005
Year
Unknown Venue
Mocvd TinElectrical Engineering3D Ic ArchitectureEngineeringTriple Gate DevicesTriple-gate DevicesNanoelectronicsBias Temperature InstabilityTechnology ScalingApplied PhysicsSemiconductor Device FabricationMicroelectronicsPmos DevicesSemiconductor Device
We demonstrate for the first time the performance of aggressively scaled triple gate devices with a MOCVD TiN/HfO gate stack. The transistors have physical gate lengths down to 40 nm, and 60 nm tall and 10 nm wide fins. We show that MOCVD TiN can be used to successfully set the threshold voltage of both nMOS and pMOS devices in the range of |0.4-0.5| V. Devices with excellent Ion/Ioff behavior were obtained with reduced gate leakage values.
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