Concepedia

Accurate and efficient extraction of interconnect circuits for full-chip timing analysis

Proceedings of WESCON'95 · 2002 · 10 citations · 0 references

Concepts

EngineeringComputer EngineeringElectrical EngineeringComputer ArchitectureMicroelectronicsSystem-on-chip DesignDelay ModelingIntegrated Circuit DesignInterconnect ArchitectureInterconnect DesignTiming AnalysisTiming ModelingInterconnect Delay AnalysisInterconnect Delay ModelingInterconnect Delay OptimizationInterconnect ModelingMicroarchitectural Timing AnalysisStatic Timing AnalysisTiming Characterization