2004 · 30 citations · 6 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureDesign AutomationMicroelectronicsBuilt-in Self-testDesign For TestabilityIntegrated Circuit DesignMicroarchitecture DesignPhysical DesignProcessor Core DesignDebug AutomationDebug Probe TechniquesDesign MethodologyLow-power Design For TestabilityOn-chip DebuggingScalable Design MethodologySilicon DebuggingTransistor Scaling
A third generation Pentium/sup /spl reg//4 processor is designed to meet the challenges of a 90 nm technology. Design methodology allows scalability with increased transistor performance over the life of the process. Improved design for test techniques are developed to facilitate the debug process. We also discuss improved design automation techniques to reduce hand-drawn schematics.
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