On-Chip Debugging is a hardware-assisted debugging methodology in which the debugging logic is integrated directly into the target system-on-chip, enabling non-intrusive, real-time observation and control of processor core behavior and on-die peripherals during execution.
151
Publications
4.7K
Citations
337
Authors
115
Institutions
Publications per year
2017–2026
10
Publications
151
A reconfigurable design-for-debug infrastructure for SoCs
M. Abramovici, P. Bradley, Kumar Dwarakanath et al. · 2006 · 276 citations
Towards Developing High Performance RISC-V Processors Using Agile Methodology
1–5 of 151
Authors
337
- BV
13
h-index
- NN
12
h-index
- SJ
11
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- HF
9
h-index
- KG
6
h-index
1–5 of 337
Institutions
115
McMaster University
Hamilton, Canada
12 h-index
28 publications
1.3K citations
University of British Columbia
Vancouver, Canada
11 h-index
28 publications
1K citations
Philips (Netherlands)
Amsterdam, The Netherlands
10 h-index
20 publications
916 citations
Intel (United States)
Santa Clara, United States
10 h-index
14 publications
472 citations
NXP (Netherlands)
Eindhoven, The Netherlands
9 h-index
17 publications
643 citations
Infineon Technologies (Germany)
Munich, Germany
5 h-index
7 publications
206 citations
Chinese University of Hong Kong
Hong Kong, Hong Kong
5 h-index
9 publications
173 citations
Brigham Young University
Provo, United States
5 h-index
8 publications
152 citations
1–8 of 115
Venues
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
5 publications · 112 citations
5
h-index
- IEEE Design & Test of Computers
5 publications · 213 citations
5
h-index
- IEEE Transactions on Computers
4 publications · 145 citations
4
h-index
- Design, Automation, and Test in Europe
Conference · 3 publications · 94 citations
3
h-index
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
3 publications · 194 citations
3
h-index
1–5