Partial Redundancy Elimination

Partial Redundancy Elimination is a compiler optimization technique that eliminates computations which are redundant on some, but not necessarily all, control flow paths by inserting computations at strategic points to make them fully redundant and then removing the original redundant expressions.

90

Publications

4.8K

Citations

195

Authors

87

Institutions

Publications per year

2017–2026

5

Authors

195

  1. RG
    Rajiv Gupta

    University of California, Riverside, United States

    9 publications · 615 citations

    9

    h-index

  2. RB
    Rastislav Bodík

    University of California, Berkeley, United States

    7 publications · 501 citations

    7

    h-index

  3. SC
    Sun Chan

    Silicon Labs (United States), United States

    6 publications · 361 citations

    6

    h-index

  4. RE
    Robert E. Kennedy

    Oregon State University, United States

    5 publications · 365 citations

    5

    h-index

  5. ML
    Mary Lou Soffa

    University of Pittsburgh, United States

    5 publications · 248 citations

    5

    h-index

1–5 of 195

Venues

  1. ACM SIGPLAN Notices

    16 publications · 477 citations

    13

    h-index

  2. 5

    h-index

  3. Software Practice and Experience

    4 publications · 255 citations

    4

    h-index

  4. ACM Transactions on Architecture and Code Optimization

    TACO · 2 publications · 28 citations

    2

    h-index

  5. IEEE Transactions on Parallel and Distributed Systems

    TPDS · 2 publications · 81 citations

    2

    h-index

1–5