Isolation Cell Design
Isolation Cell Design is a circuit-level methodology in multi-voltage design that belongs to the class of power management techniques and is specifically distinguished by its function of enforcing stable known logic states on signals exiting a power-gated domain to prevent undefined behavior during voltage transitions.
14
Publications
263
Citations
86
Authors
18
Institutions
Publications per year
2017–2026
0
14
An isolation-merged vertical capacitor cell for large capacity DRAM
Satoshi Nakajima, Kouichi Miura, K. Minegishi et al. · 1984 · 26 citations
Trench isolation for 0.45 μm active pitch and below
A.H. Perera, Jung‐Hui Lin, Yao-Ching Ku et al. · 2002 · 23 citations
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Texas Instruments (United States)
Dallas, United States
2 h-index
9 publications
192 citations
Infineon Technologies (Germany)
Munich, Germany
2 h-index
10 publications
145 citations
Toshiba (Japan)
Tokyo, Japan
1 h-index
5 publications
160 citations
Hôpital d'Hautepierre
Strasbourg, France
1 h-index
1 publications
15 citations
Hôpitaux Universitaires de Strasbourg
Strasbourg, France
1 h-index
5 publications
75 citations
Science et Médecine (France)
Créteil, France
1 h-index
4 publications
60 citations
Institut de Mécanique des Fluides de Toulouse
Toulouse, France
1 h-index
3 publications
45 citations
Motorola (United States)
Schaumburg, United States
1 h-index
8 publications
184 citations
1–8 of 18
2 publications · 25 citations
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JES · 1 publications · 24 citations
1
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1 publications · 26 citations
1
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1 publications · 15 citations
1
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1 publications · 18 citations
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