Concepedia

Boundary Scan Testing

Boundary Scan Testing is a standardized integrated circuit testing methodology that enables the verification and diagnosis of interconnects on printed circuit boards by embedding a serial shift register, or boundary scan chain, at the periphery of integrated circuits to facilitate controllability and observability of internal test points without requiring physical probe access.

132

Publications

4.2K

Citations

267

Authors

99

Institutions

Publications per year

2017–2026

2

Variants

Ieee 1149.1 TestingJtag Testing

Parents

Publications

132

Oscillation-test strategy for analog and mixed-signal integrated circuits

K. Arabi, Bożena Kamińska · 2002 · 170 citations

, , +15

DESIGN FOR TESTABILITY USING SCANPATH TECHNIQUES FOR PATH-DELAY TEST AND MEASUREMENT

Bulent I. Dervisoglu, Gayvin E. Stong · 2005 · 167 citations

, , +15

Testing and diagnosis of interconnects using boundary scan architecture

A.S.M. Hassan, Janusz Rajski, V.K. Agarwal · 2003 · 142 citations

, , +17

CMOS sensors for on-line thermal monitoring of VLSI circuits

V. Székely, Cs. Márta, Z. Kohari et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1997 · 102 citations

, , +17

Principles of testing electronic systems

Choice Reviews Online · 2001 · 99 citations

, , +17

1–5 of 132

Authors

267

  1. CY
    C.W. Yau

    AT&T (United States), United States

    6 publications · 224 citations

    6

    h-index

  2. KP
    Kenneth P. Parker

    Agilent Technologies (United States), United States

    5 publications · 93 citations

    5

    h-index

  3. RE
    Rodham E. Tulloss

    Theodore Roosevelt High School, United States

    4 publications · 85 citations

    4

    h-index

  4. WC
    Wu-Tung Cheng

    Mentor Technologies, United States

    4 publications · 156 citations

    4

    h-index

  5. AH
    A.S.M. Hassan

    McGill University, Canada

    4 publications · 282 citations

    4

    h-index

1–5 of 267

Institutions

99

  1. AT&T (United States)

    Bedminster, United States

    11 h-index

    20 publications

    768 citations

  2. IBM (United States)

    Armonk, United States

    6 h-index

    20 publications

    595 citations

  3. Agilent Technologies (United States)

    Santa Clara, United States

    5 h-index

    5 publications

    122 citations

  4. Philips (Netherlands)

    Amsterdam, The Netherlands

    5 h-index

    16 publications

    376 citations

  5. The University of Texas at Dallas

    Richardson, United States

    4 h-index

    12 publications

    393 citations

  6. National Cheng Kung University

    Tainan City, Taiwan

    4 h-index

    10 publications

    325 citations

  7. Universidade do Porto

    Porto, Portugal

    4 h-index

    7 publications

    111 citations

  8. Texas Instruments (United States)

    Dallas, United States

    4 h-index

    7 publications

    108 citations

1–8 of 99

Venues

  1. IEEE Design & Test of Computers

    8 publications · 212 citations

    8

    h-index

  2. 8

    h-index

  3. Journal of Electronic Testing

    JETTA · 4 publications · 57 citations

    4

    h-index

  4. 3

    h-index

  5. Microelectronics Journal

    3 publications · 87 citations

    3

    h-index

1–5