H. Iizuka

Electrically alterable avalanche-injection-type MOS READ-ONLY memory with stacked-gate structure

H. Iizuka, F. Masuoka, Tai Satô et al. · IEEE Transactions on Electron Devices · 1976 · 67 citations

Non-volatile Memory, Electrical Engineering, Engineering +15

An optimally designed process for submicron MOSFETs

T. Shibata, K. Hieda, M. Sato et al. · 1981 · 48 citations

Electrical Engineering, Engineering, Vlsi Design +10

A new bird's-beak free field isolation technology for VLSI devices

K. Kurosawa, T. Shibata, H. Iizuka · 1981 · 40 citations

Engineering, Vlsi Design, New Technology +20

An optimally designed process for submicrometer MOSFET's

T. Shibata, K. Hieda, Masaki Sato et al. · IEEE Transactions on Electron Devices · 1982 · 37 citations

Low-power Electronics, Electrical Engineering, Engineering +13

A simplified box (buried-oxide) isolation technology for megabit dynamic memories

T. Shibata, Ryo Nakayama, K. Kurosawa et al. · 1983 · 31 citations

Non-volatile Memory, Engineering, Box Structure +16