A 30-ns 64-Mb DRAM with built-in self-test and self-repair function

A. Tanabe, T. Takeshima, Hiroki Koike, +16

IEEE Journal of Solid-State Circuits

EngineeringEmerging Memory TechnologyMem TestingComputer ArchitectureOpen Bit-line Readout +14

NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors

T. Miwa, J. Yamada, Hiroki Koike, +7

IEEE Journal of Solid-State Circuits

Hardware SecurityNon-volatile MemoryElectrical EngineeringMemory ArchitectureEngineering +9

Three dimensional ICs, having four stacked active device layers

T. Kunio, K. Oyama, Y. Hayashi, +1

EngineeringFour-layer-stacked Master SliceIntegrated CircuitsSilicon On InsulatorWafer Scale Processing +17

A dual-metal gate CMOS technology using nitrogen-concentration-controlled TiNx film

Hitoshi Wakabayashi, Y. Saito, Kiyoshi Takeuchi, +2

IEEE Transactions on Electron Devices

Materials ScienceElectrical EngineeringEngineeringNanoelectronicsApplied Physics +7

An effective channel length determination method for LDD MOSFETs

Kiyoshi Takeuchi, N. Kasai, T. Kunio, +1

IEEE Transactions on Electron Devices

Device ModelingChannel LengthElectrical EngineeringEngineeringElectronic Engineering +9

A 60-ns 1-Mb nonvolatile ferroelectric memory with a nondriven cell plate line write/read scheme

Hiroki Koike, T. Otsuki, Tsukasa Kimura, +14

IEEE Journal of Solid-State Circuits

Materials ScienceNon-volatile MemoryElectrical EngineeringEngineeringNanoelectronics +12

Sub-50-nm physical gate length CMOS technology and beyond using steep halo

Hitoshi Wakabayashi, M. Ueki, M. Narihiro, +8

IEEE Transactions on Electron Devices

Low-power ElectronicsElectrical EngineeringPhysical Design (Electronics)EngineeringVlsi Design +12

A 30-ns 256-Mb DRAM with a multidivided array structure

Tadahiko Sugibayashi, T. Takeshima, I. Naritake, +18

IEEE Journal of Solid-State Circuits

EngineeringVlsi DesignEmerging Memory TechnologyComputer ArchitectureIntegrated Circuits +15

45-nm gate length CMOS technology and beyond using steep halo

Hitoshi Wakabayashi, M. Ueki, M. Narihiro, +8

Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignNanoelectronics +10

The early stage of fatigue crack growth in martensitic steel

T. Kunio, Masao Shimizu, Kentaro Yamada, +2

International Journal of Fracture

Materials ScienceEngineeringMechanical EngineeringHigh Strength Low Alloy SteelCrack Formation +6