H. Jagannathan

Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET

N. Loubet, Terence B. Hook, P. Montanini et al. · 2017 · 988 citations

Engineering, Electrical Engineering, Microelectronics +15

A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels

Ruijie Xie, P. Montanini, Kerem Akarvardar et al. · 2016 · 144 citations

Engineering, Electrical Engineering, Materials Science +15

A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI

Kwangyou Seo, Bala Haran, Divya Gupta et al. · 2014 · 99 citations

Engineering, Computer Engineering, Electrical Engineering +17

Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond

Hikaru Kawasaki, V. Basker, T. Yamashita et al. · 2009 · 94 citations

Engineering, Computer Engineering, Electrical Engineering +17

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

Siddarth Krishnan, U. Kwon, N. Moumen et al. · 2011 · 81 citations

Engineering, Computer Engineering, Electrical Engineering +17