Won Seok Han

A 45nm Logic Technology with High-k+Metal Gate Transistors, Strained Silicon, 9 Cu Interconnect Layers, 193nm Dry Patterning, and 100% Pb-free Packaging

K. Mistry, R. Chau, Changhwan Choi et al. · 2007 · 825 citations

Nm Logic Technology, Engineering, Vlsi Design +18

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 521 citations

-Generation Finfet, Rectangular Fins, Engineering +16

Observation of Cu²⁺–H₂ Interactions in a Fully Desolvated Sodalite‐Type Metal–Organic Framework

Mircea Dincă, Won Seok Han, Yun Liu et al. · Angewandte Chemie International Edition · 2007 · 409 citations

Materials Science, Inorganic Chemistry, Chemical Engineering +12

A 90 nm logic technology featuring 50 nm strained silicon channel transistors, 7 layers of Cu interconnects, low k ILD, and 1 μm/sup 2/ SRAM cell

Scott E. Thompson, N. Anand, M Armstrong et al. · 2003 · 241 citations

Nm Logic Technology, Engineering, Vlsi Design +19

A Selective Fluoroionophore Based on BODIPY‐functionalized Magnetic Silica Nanoparticles: Removal of Pb²⁺ from Human Blood

Hye Young Lee, Doo Ri Bae, Ji Chan Park et al. · Angewandte Chemie International Edition · 2009 · 198 citations