PPAC of sheet-based CFET configurations for 4 track design with 16nm metal pitch

P. Schuddinck, F. M. Bufler, Yang Xiang, +8

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

Low-power ElectronicsElectrical EngineeringTight Gate PitchEngineeringVlsi Design +10

Ultrawide Frequency Range Crosstalk Into Standard and Trap-Rich High Resistivity Silicon Substrates

Khaled Ben Ali, C. Roda Neve, Ali Gharsallah, +1

IEEE Transactions on Electron Devices

Electrical EngineeringEngineeringPhysicsHigh-frequency DeviceNanoelectronics +10

Advanced Si-based substrates for RF passive integration: Comparison between local porous Si layer technology and trap-rich high resistivity Si

Panagiotis Sarafis, E. Hourdakis, A. G. Nassiopoulou, +3

Solid-State Electronics

Rf Passive IntegrationElectrical EngineeringEngineeringRf SemiconductorNanoelectronics +8

RF and linear performance of commercial 200 mm trap-rich HR-SOI wafers for SoC applications

C. Roda Neve, K. Ben Alia, C. Malaquin, +5

EngineeringLinear PerformanceCommercial 200Soc ApplicationsIntegrated Circuits +14

RF SOI CMOS technology on commercial trap-rich high resistivity SOI wafer

Khaled Ben Ali, C. Roda Neve, Ali Gharsallah, +1

EngineeringIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)Electronic Devices +16

Demonstration of 3D sequential FD-SOI on CMOS FinFET stacking featuring low temperature Si layer transfer and top tier device fabrication with tier interconnections

A. Vandooren, Narendra Parihar, J. Franco, +22

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

EngineeringIntegrated CircuitsSilicon On InsulatorInterconnect (Integrated Circuits)Advanced Packaging (Semiconductors) +16

Active-lite interposer for 2.5 & 3D integration

Geert Hellings, Mirko Scholz, Mikael Detalle, +12

3D Ic ArchitectureElectrical EngineeringActive ComponentsEngineeringDevice Integration +12

Impact of Si substrate resistivity on the non-linear behaviour of RF CPW transmission lines

C. Roda Neve, Dimitri Lederer, G. Pailloncy, +5

Electrical EngineeringEngineeringRf SemiconductorRadio FrequencyHigh-frequency Device +9

Porous Si as a substrate material for RF passive integration

A. G. Nassiopoulou, E. Hourdakis, Panagiotis Sarafis, +5