K. Tokano

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Active since

2003

Affiliations

K. Tokano is an author at Toshiba (Japan) specializing in semiconductor devices, electrical engineering, and complementary metal-oxide-semiconductor technology.

Publications per year

2003–2007

Publications

A novel low on-resistance Schottky-barrier diode with p-buried floating layer structure

Wataru Saito, Ichiro Omura, K. Tokano et al. · IEEE Transactions on Electron Devices · 2004 · 24 citations

Engineering, Electrical Engineering, Materials Science +14

Ultra low on-resistance SBD with p-buried floating layer

W. Saitoh, Ichiro Omura, K. Tokano et al. · 2003 · 22 citations

Engineering, Electrical Engineering, Materials Science +12

Design concept of n-buffer layer (n-Bottom Assist Layer) for 600V-class Semi-Super Junction MOSFET

Syotaro Ono, Wataru Saito, M. Takashita et al. · 2007 · 21 citations

Engineering, Electrical Engineering, Electronic Materials +15

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