R. Ramamurthy

Gate length scaling beyond Si: Mono-layer 2D Channel FETs Robust to Short Channel Effects

C. J. Dorow, Ashish Verma Penumatcha, A. Kitamura et al. · 2022 International Electron Devices Meeting (IEDM) · 2022 · 49 citations

Engineering, Electrical Engineering, Materials Science +13

Record Performance in GAA 2D NMOS and PMOS Using Monolayer MoS2 and WSe2 with Scaled Contact and Gate Length

Wouter Mortelmans, Pratyush Buragohain, Carly Rogan et al. · 2024 · 20 citations

Engineering, Electrical Engineering, Materials Science +17

Process Innovations for Future Technology Nodes with Back-Side Power Delivery and 3D Device Stacking

M. Kobrinsky, J. D Silva, Ehren Mannebach et al. · 2023 · 19 citations

Engineering, Computer Engineering, Electrical Engineering +17

Novel Cell Architectures with Back-side Transistor Contacts for Scaling and Performance

M. Kobrinsky, J. D Silva, Ehren Mannebach et al. · 2023 · 15 citations

Engineering, Computer Engineering, Electrical Engineering +16

Reliability Assessment of Double-Gated Wafer-Scale MoS₂ Field Effect Transistors through Hysteresis and Bias Temperature Instability Analyses

Alexandros Provias, Theresia Knobloch, A. Kitamura et al. · 2023 · 11 citations

Engineering, Electrical Engineering, Materials Science +17