Risho Koh

A study of the threshold voltage variation for ultra-small bulk and SOI CMOS

Kiyoshi Takeuchi, Risho Koh, Tohru Mogami · IEEE Transactions on Electron Devices · 2001 · 82 citations

Engineering, Computer Engineering, Electrical Engineering +17

Buried Layer Engineering to Reduce the Drain-Induced Barrier Lowering of Sub-0.05 µm SOI-MOSFET

Risho Koh · Japanese Journal of Applied Physics · 1999 · 50 citations

Engineering, Electrical Engineering, Materials Science +17

Universal NBTI Compact Model for Circuit Aging Simulation under Any Stress Conditions

Chenyue Ma, Hans Jürgen Mattausch, Kazuya Matsuzawa et al. · IEEE Transactions on Device and Materials Reliability · 2014 · 46 citations

Engineering, Electrical Engineering, Aging +16

Fabrication of three-dimensional IC using `cumulatively bonded IC' (CUBIC) technology

Y. Hayashi, S. Wada, K. Kajiyana et al. · 1990 · 26 citations

Engineering, Computer Engineering, Electrical Engineering +16

Compact reliability model for degradation of advanced p-MOSFETs due to NBTI and hot-carrier effects in the circuit simulation

C. Ma, Hans Jürgen Mattausch, M. Miyake et al. · 2013 · 25 citations

Engineering, Electrical Engineering, Microelectronics +16