P. Riess

Reliability aspects of gate oxide under ESD pulse stress

Adrien Ille, Wolfgang Stadler, T. Pompl et al. · 2007 · 44 citations

Reliability, Electrical Engineering, Reliability Engineering +15

Electric field and temperature dependence of the stress induced leakage current: Fowler–Nordheim or Schottky emission?

P. Riess, G. Ghibaudo, G. Pananakakis et al. · Journal of Non-Crystalline Solids · 1999 · 26 citations

Electrical Engineering, Engineering, Stress-induced Leakage Current +6

Evaluation of diode-based and NMOS/Lnpn-based ESD protection strategies in a triple gate oxide thickness 0.13 µm CMOS logic technology

Robert Gauthier, Wolfgang Stadler, Kai Esmark et al. · 2001 · 23 citations

Hardware Security, Low-power Electronics, Electrical Engineering +15

Integration of high-performance, low-leakage and mixed signal features into a 100 nm CMOS technology

T. Schafbauer, J. Brighten, Yi-Cheng Chen et al. · 2003 · 22 citations

Low-power Electronics, Electrical Engineering, Engineering +14

ESD-induced oxide breakdown on self-protecting GG-nMOSFET in 0.1-μm CMOS technology

Akram Salman, Robert Gauthier, C. Putnam et al. · IEEE Transactions on Device and Materials Reliability · 2003 · 21 citations

Transmission Line Pulse, Electrical Engineering, Semiconductor Device +14