M. Manley

NMOS drive current reduction caused by transistor layout and trench isolation induced stress

G. Scott, J. Lutze, F. Nouri et al. · 2003 · 124 citations

Device Modeling, Electrical Engineering, Engineering +13

Process and design for ESD robustness in deep submicron CMOS technology

C.-S. Jiang, Ethan Nowak, M. Manley · 1996 · 34 citations

Physical Layout Design, Electrical Engineering, Engineering +15

Transistor off-state leakage current induced by TiSi₂ pre-amorphizing implant in a 0.20 μm CMOS process

J. Lutze, G. Scott, M. Manley · IEEE Electron Device Letters · 2000 · 20 citations

Materials Engineering, μM Cmos Process, Electrical Engineering +12

Novel magnetic-field sensor using carrier-domain rotation: operation and practical performance

M. Manley, G.G. Bloodworth, Y.Z. Bahnas · Electronics Letters · 1976 · 13 citations

Magnetism, Electrical Engineering, Spintronics +12

Narrow Device Issues in Deep-Submicron Technologies-the Influence of Stress, TED and Segregation on Device Performance

F. Nouri, George Scott, M. Rubín et al. · 2000 · 12 citations

Electrical Engineering, Engineering, Vlsi Design +9