Jaeseung Choi

A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization

Taejoong Song, Woojin Rim, Sunghyun Park et al. · IEEE Journal of Solid-State Circuits · 2016 · 85 citations

Low-power Electronics, Assist Adjustment System, Electrical Engineering +11

A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications

Taejoong Song, Jong Hoon Jung, Woojin Rim et al. · 2018 · 73 citations

Engineering, Vlsi Design, Electron-beam Lithography +18

Positive and negative tone double patterning lithography for 50nm flash memory

Chang-Moon Lim, Seo-Min Kim, Young-Sun Hwang et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2006 · 54 citations

Optical Materials, Engineering, Electron-beam Lithography +16

17.1 A 10nm FinFET 128Mb SRAM with assist adjustment system for power, performance, and area optimization

Taejoong Song, Woojin Rim, Sunghyun Park et al. · 2016 · 41 citations

Low-power Electronics, Assist Adjustment System, Electrical Engineering +13

Issues and challenges of double patterning lithography in DRAM

Seo-Min Kim, Sunyoung Koo, Jaeseung Choi et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2007 · 30 citations

Physical Design (Electronics), Engineering, Beam Lithography +12