M. Ishikawa

One-dimensional writing model of n-channel floating gate ionization-injection MOS (FIMOS)

S. Tanaka, M. Ishikawa · IEEE Transactions on Electron Devices · 1981 · 37 citations

Device Modeling, Electrical Engineering, Gate Ionization-injection Mos +13

0.6 V suppy voltage 0.25 μm E/D-HJFET(IS/sup 3/T) LSI technology for low power consumption and high speed LSIs

H. Hida, Masatoshi Tokushima, Takehiko Maeda et al. · 2002 · 20 citations

Engineering, New Technology, Low Supply Voltage +18

A 1.2V 1Mbit embedded MRAM core with folded bit-line array architecture

Takeshi Tsuji, M. Ishikawa, Jun Otani et al. · 2004 · 19 citations

Non-volatile Memory, Electrical Engineering, Engineering +12

Submicron CMOS technologies for four mega bit dynamic RAM

H. Ishiuchi, T. Watanabe, K. Kishi et al. · 1985 · 16 citations

Trench Capacitor Cell, Submicron Cmos Technologies, Electrical Engineering +10

An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF)

Takehiko Maeda, K. Numata, Masahiro Fujii et al. · IEEE Journal of Solid-State Circuits · 1996 · 14 citations

Low-power Electronics, Electrical Engineering, Engineering +9