C. Di Nardo

Engineering strained silicon on insulator wafers with the Smart CutTM technology

B. Ghyselen, Jean‐Michel Hartmann, T. Ernst et al. · Solid-State Electronics · 2004 · 114 citations

Insulator Wafers, Semiconductor Technology, Electrical Engineering +8

Modeling the redox equilibrium of the Ce4+/Ce3+ couple in silicate glass by voltammetry

Olivier Pinet, J. Phalippou, C. Di Nardo · Journal of Non-Crystalline Solids · 2006 · 40 citations

Materials Science, Redox Equilibrium, Glass-ceramic +9

High-temperature growth of very high germanium content SiGe virtual substrates

Y. Bogumilowicz, Jean‐Michel Hartmann, C. Di Nardo et al. · Journal of Crystal Growth · 2006 · 33 citations

Materials Engineering, Materials Science, Epitaxial Growth +8

19‐6: <i>Invited Paper</i> : A Novel Process for Fabricating High‐Resolution and Very Small Pixel‐pitch GaN LED Microdisplays

François Templier, L. Benaissa, Bernard Aventurier et al. · SID Symposium Digest of Technical Papers · 2017 · 22 citations

An efficient wet-cleaning of SiGe virtual substrates and of thick, pure Ge layers on Si(001) after a chemical mechanical planarization step

Alexandra Abbadie, Jean‐Michel Hartmann, C. Di Nardo et al. · Microelectronic Engineering · 2006 · 17 citations

Materials Engineering, Materials Science, Wafer Scale Processing +12