Rahul Shringarpure

Circuit-Level Impact of a-Si:H Thin-Film-Transistor Degradation Effects

David R. Allee, Lawrence T. Clark, Bryan D. Vogt et al. · IEEE Transactions on Electron Devices · 2009 · 45 citations

Materials Engineering, Electrical Engineering, Engineering +13

Localization of Gate Bias Induced Threshold Voltage Degradation in a-Si:H TFTs

Rahul Shringarpure, Sameer M. Venugopal, Lawrence T. Clark et al. · IEEE Electron Device Letters · 2008 · 28 citations

Semiconductor Technology, Electrical Engineering, H Tfts +12

Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175

Rahul Shringarpure, Sameer M. Venugopal, Zi Li et al. · IEEE Transactions on Electron Devices · 2007 · 21 citations

Degradation effects in a-Si:H thin film transistors and their impact on circuit performance

David R. Allee, Lawrence T. Clark, Rahul Shringarpure et al. · 2008 · 11 citations

Device Modeling, Electrical Engineering, Engineering +10

Amorphous silicon logic circuits on flexible substrates

Rahul Shringarpure, Lawrence T. Clark, Sameer M. Venugopal et al. · 2008 · 10 citations

Electrical Engineering, Engineering, Vlsi Design +13