Sameer M. Venugopal - Concepedia

Author

Sameer M. Venugopal

Arizona State University

Also Known As

Sameer M Venugopal, Sameer M. Venugopal, Sameer Venugopal

Publications

437

Citations

H-Index

Concepts

All Affiliations

Arizona State University European Council for an Energy Efficient Economy

About

Sameer M. Venugopal is an author at Arizona State University specializing in electrical engineering, applied physics, and engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	11	14	331
2	Applied Physics	11	12	272
3	Electrical Engineering	11	12	307
4	Computer Engineering	2	2	28
5	Chemistry	1	1	19

Sameer M. Venugopal

Publications

368

Citations

H-Index

Page 1

	Year	Citations
Low‐temperature amorphous‐silicon backplane technology development for flexible displays in a manufacturing pilot‐line environment Gregory B. Raupp, Shawn M. O’Rourke, Curt Moyer, Journal of the Society for Information Display EngineeringIntegrated CircuitsDisplay‐scale Pilot LineElectronic DevicesWafer Scale Processing	2007	56
Integrated a-Si:H Source Drivers for 4$^{\prime\prime}$ QVGA Electrophoretic Display on Flexible Stainless Steel Substrate Sameer M. Venugopal, David R. Allee Journal of Display Technology Electrical EngineeringEngineeringDisplay TechnologyFlexible ElectronicsAdvanced Display Technology	2007	46
Circuit-Level Impact of a-Si:H Thin-Film-Transistor Degradation Effects David R. Allee, Lawrence T. Clark, Bryan D. Vogt, IEEE Transactions on Electron Devices Materials EngineeringElectrical EngineeringEngineeringNanoelectronicsBias Temperature Instability	2009	45
Stability of IZO and a-Si:H TFTs Processed at Low Temperature (200 $^{\circ}{\hbox{C}}$) Korhan Kaftanoglu, Sameer M. Venugopal, Michael Marrs, Journal of Display Technology H TftsEngineeringOrganic ElectronicsMixed-oxide Thin-film TransistorsSilicon On Insulator	2011	34
Localization of Gate Bias Induced Threshold Voltage Degradation in a-Si:H TFTs Rahul Shringarpure, Sameer M. Venugopal, Lawrence T. Clark, IEEE Electron Device Letters Semiconductor TechnologyElectrical EngineeringH TftsEngineeringPhysics	2008	28
Circuit Simulation of Threshold-Voltage Degradation in a-Si:H TFTs Fabricated at 175 Rahul Shringarpure, Sameer M. Venugopal, Zi Li, IEEE Transactions on Electron Devices	2007	21
65.4: Active Matrix PHOLED Displays on Temporary Bonded Polyethylene Naphthalate Substrates with 180 °C a‐Si:H TFTs Doug Loy, Yong Kyun Lee, Cynthia S. Bell, SID Symposium Digest of Technical Papers Registration DistortionH TftsEngineeringQvga Active MatrixIntegrated Circuits	2009	19
CMOS TFT Op-Amps: Performance and Limitations Aritra Dey, Adrian Avendanno, Sameer M. Venugopal, IEEE Electron Device Letters Electrical EngineeringCmos Tft Op-ampsThin-film TransistorPentacene TftsEngineering	2011	18
Threshold‐voltage recovery of a‐Si:H digital circuits Sameer M. Venugopal, David R. Allee, Zi Li, Journal of the Society for Information Display	2006	16
Effect of Mechanical and Electromechanical Stress on a-ZIO TFTs Aritra Dey, Anil Indluru, Sameer M. Venugopal, IEEE Electron Device Letters EngineeringOrganic ElectronicsMechanical EngineeringElectromechanical StressFlexible Sensor	2010	14

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