S. Filipiak

A high performance 1.8 V, 0.20 μm CMOS technology with copper metallization

S. Venkatesan, A. V. Gelatos, S. Hisra et al. · 2002 · 101 citations

Engineering, Computer Engineering, Electrical Engineering +17

A high density 0.10 μm CMOS technology using low K dielectric and copper interconnect

Shivendra Singh Parihar, M. Angyal, B. Boeck et al. · 2002 · 15 citations

Engineering, Computer Engineering, Electrical Engineering +17

Strain-Enhanced CMOS Through Novel Process-Substrate Stress Hybridization of Super-Critically Thick Strained Silicon Directly on Insulator (SC-SSOI)

C. Mazuré, Ian Cayrefourcq, J. Mogab et al. · 2006 · 13 citations

Engineering, Electrical Engineering, Materials Science +17

Integration of SiCN as a low κ etch stop and Cu passivation in a high performance Cu/low κ interconnect

Jeremy I. Martin, S. Filipiak, T. Stephens et al. · 2003 · 13 citations

Engineering, Materials Engineering, Materials Science +16

Integration Of BPDA-PDA Polyimide With Two Levels Of Al(Cu) Interconnects

J. T. Wetzel, Y. T. Lii, S. Filipiak et al. · MRS Proceedings · 1995 · 10 citations

Natural Sciences, Materials Engineering, Materials Science +11