H. Noda

Simulation of sub-0.1- mu m MOSFETs with completely suppressed short-channel effect

Junko Tanaka, T. Toyabe, Sigeo Ihara et al. · IEEE Electron Device Letters · 1993 · 54 citations

Engineering, Electrical Engineering, Microelectronics +16

Short-channel-effect-suppressed sub-0.1-μm grooved-gate MOSFET's with W gate

S. Kimura, J. Tanaka, H. Noda et al. · IEEE Transactions on Electron Devices · 1995 · 38 citations

Engineering, Electrical Engineering, Manufacturing Engineering +17

Dual-period self-refresh scheme for low-power DRAM's with on-chip PROM mode register

Y. Idei, K. Shimohigashi, Masakazu Aoki et al. · IEEE Journal of Solid-State Circuits · 1998 · 28 citations

Engineering, Computer Engineering, Electrical Engineering +16

Threshold voltage controlled 0.1-μm MOSFET utilizing inversion layer as extreme shallow source/drain

H. Noda, Fabrício Murai, S. Kimura · 2002 · 21 citations

Engineering, Electrical Engineering, Electronic Materials +13

Short channel characteristics of Si MOSFET with extremely shallow source and drain regions formed by inversion layers

H. Noda, Fabrício Murai, S. Kimura · IEEE Transactions on Electron Devices · 1994 · 17 citations

Engineering, Electrical Engineering, Microelectronics +15