Submicrometer MOSFET structure for minimizing hot-carrier generation

Eiji Takeda, Haruki Kume, T. Toyabe, +1

IEEE Transactions on Electron Devices

Low-power ElectronicsDevice ModelingElectrical EngineeringSemiconductor TechnologyMosfet Structure +12

A numerical model of avalanche breakdown in MOSFET's

T. Toyabe, Ken Yamaguchi, S. Asai, +1

IEEE Transactions on Electron Devices

Device ModelingElectrical EngineeringEngineeringBias Temperature InstabilityNumerical Simulation +7

Analytical models of threshold voltage and breakdown voltage of short-channel MOSFET's derived from two-dimensional analysis

T. Toyabe, S. Asai

IEEE Transactions on Electron Devices

Device ModelingElectrical EngineeringEngineeringSurface PotentialThreshold Voltage +8

Three-dimensional device simulator Caddeth with highly convergent matrix solution algorithms

T. Toyabe, H. Masuda, Yuta Aoki, +2

IEEE Transactions on Electron Devices

Numerical AnalysisEngineeringThree DimensionsSimulationComputer-aided Design +21

A corrugated capacitor cell (CCC)

H. Sunami, T. Kure, N. Hashimoto, +3

IEEE Transactions on Electron Devices

Non-volatile MemoryEngineeringMemory DesignHybrid CapacitorEmerging Memory Technology +19

A corrugated capacitor cell (CCC) for megabit dynamic MOS memories

H. Sunami, T. Kure, N. Hashimoto, +3

Ccc ConceptElectrical EngineeringNon-volatile MemoryEngineeringNanoelectronics +12

Analytical models of threshold voltage and breakdown voltage of short-channel MOSFETs derived from two-dimensional analysis

T. Toyabe, S. Asai

IEEE Journal of Solid-State Circuits

Device ModelingElectrical EngineeringShort-channel MosfetsEngineeringNanoelectronics +10

Simulation of sub-0.1- mu m MOSFETs with completely suppressed short-channel effect

Junko Tanaka, T. Toyabe, Sigeo Ihara, +3

IEEE Electron Device Letters

Low-power ElectronicsDevice ModelingElectrical EngineeringSemiconductorsEngineering +13

Three-Dimensional Device Simulator CADDETH with Highly Convergent Matrix Solution Algorithms

T. Toyabe, H. Masuda, Yuta Aoki, +2

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Numerical AnalysisEngineeringThree DimensionsSimulationComputer-aided Design +21

A corrugated capacitor cell (CCC) for megabit dynamic MOS memories

H. Sunami, T. Kure, N. Hashimoto, +3

IEEE Electron Device Letters

Ccc ConceptElectrical EngineeringNon-volatile MemoryEngineeringNanoelectronics +12