J. Lacord

Performance and design considerations for gate-all-around stacked-NanoWires FETs

Sylvain Barraud, V. Lapras, B. Prévitali et al. · 2017 · 147 citations · Full text

Electrical Engineering, Gate-all-around Stacked-nanowires Fets, Engineering +10

14nm FDSOI technology for high speed and energy efficient applications

O. Weber, E. Josse, F. Andrieu et al. · 2014 · 89 citations

Low-power Electronics, Electrical Engineering, Engineering +9

Comprehensive and Accurate Parasitic Capacitance Models for Two- and Three-Dimensional CMOS Device Structures

J. Lacord, G. Ghibaudo · IEEE Transactions on Electron Devices · 2012 · 78 citations

Device Modeling, Electrical Engineering, Physical Design (Electronics) +13

Reconfigurable field effect transistor for advanced CMOS: Advantages and limitations

Carlos Navarro, Sylvain Barraud, S. Martinie et al. · Solid-State Electronics · 2016 · 48 citations

Electrical Engineering, Engineering, Vlsi Design +5

Tunability of Parasitic Channel in Gate-All-Around Stacked Nanosheets

Sylvain Barraud, B. Prévitali, V. Lapras et al. · 2018 · 46 citations

Device Modeling, Gaa Fets, Electrical Engineering +13