Veeraraghavan Basker

Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications

J. Zhang, Julien Frougier, Andrew Greene et al. · 2019 · 93 citations

Engineering, Semiconductor Device, Advanced Packaging (Semiconductors) +17

Channel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet

Chun Wing Yeung, Jingyun Zhang, Robin Chao et al. · 2018 · 91 citations

A Novel Dry Selective Etch of SiGe for the Enablement of High Performance Logic Stacked Gate-All-Around NanoSheet Devices

N. Loubet, Subhadeep Kal, Cheryl Alix et al. · 2019 · 81 citations

Engineering, Vlsi Design, Gate-all-around Nanosheet Devices +17

Role of oxygen vacancies in V/sub BF//V/sub t/ stability of pFET metals on HfO/sub 2/

E. Cartier, F. R. McFeely, Vijay Narayanan et al. · 2005 · 65 citations

Engineering, Oxygen Vacancies, Oxidation Resistance +17

High-k metal gate fundamental learning and multi-V<inf>t</inf> options for stacked nanosheet gate-all-around transistor

Jingyun Zhang, Takashi Ando, Chun Wing Yeung et al. · 2017 · 58 citations

Semiconductors, Semiconductor Technology, Electrical Engineering +10