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High-k metal gate fundamental learning and multi-V<inf>t</inf> options for stacked nanosheet gate-all-around transistor
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2017
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SemiconductorsSemiconductor TechnologyElectrical EngineeringEngineeringNanotechnologyNanoelectronicsApplied PhysicsUnique StructureSemiconductor Device FabricationMicroelectronicsCmos DeviceStacked Gaa TransistorSemiconductor Device
In this paper, we report multi-threshold-voltage (multi-Vt) options for stacked Nanosheet gate-all-around (GAA) transistors. V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> can be modulated through workfunction metal (WFM) thickness as well as the inter-nanosheet spacing (T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sus</inf> ), the combination of which may be leveraged to increase the number of undoped V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> offerings within a CMOS device menu relative to a FinFET CMOS device menu, which fundamentally does not have T <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sus</inf> as a V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> tuning option. Hence we propose our multi-V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</inf> scheme by taking advantage of the unique structure of stacked GAA transistor.