Jed Rankin

High-performance symmetric-gate and CMOS-compatible V/sub t/ asymmetric-gate FinFET devices

J. Kedzierski, David Fried, E. Nowak et al. · 2002 · 60 citations

Engineering, Electrical Engineering, Semiconductor Devices +2

A sub 40-nm body thickness n-type FinFET

David Fried, Ashley Johnson, E. Nowak et al. · 2002 · 22 citations

Engineering, Electrical Engineering, Electronic Materials +16

Lithographic benefits and mask manufacturability study of curvilinear masks

Alexander Wei, Wei Guo, Fan Jiang et al. · 2018 · 19 citations

Engineering, Manufacturing Engineering, Additive Manufacturing +13

Using pattern shift to avoid blank defects during EUVL mask fabrication

Yoshiyuki Negishi, Yuki Fujita, Kazunori Seki et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2013 · 15 citations

Engineering, Manufacturing Engineering, Digital Fabrication +11

EUV photomask defects: what prints, what doesn't, and what is required for HVM

Jed Rankin, Zhengqing John Qi, Mark Lawliss et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2015 · 12 citations

Engineering, Materials Engineering, Materials Science +16