S. Jallepalli

A computationally efficient model for inversion layer quantization effects in deep submicron N-channel MOSFETs

S.A. Hareland, Srini Krishnamurthy, S. Jallepalli et al. · IEEE Transactions on Electron Devices · 1996 · 109 citations

Device Modeling, Electrical Engineering, Efficient Model +15

Electron and hole quantization and their impact on deep submicron silicon p- and n-MOSFET characteristics

S. Jallepalli, J. Bude, W.-K. Shih et al. · IEEE Transactions on Electron Devices · 1997 · 101 citations

Device Modeling, Wide-bandgap Semiconductor, Electrical Engineering +14

CMOS Vertical Multiple Independent Gate Field Effect Transistor (MIGFET)

L. Mathew, Yaping Du, Aaron Thean et al. · 2005 · 85 citations

Electrical Engineering, Engineering, Migfet Mixer +9

Modeling gate leakage current in nMOS structures due to tunneling through an ultra-thin oxide

Wei-Kai Shih, Everett X. Wang, S. Jallepalli et al. · Solid-State Electronics · 1998 · 83 citations

Device Modeling, Electrical Engineering, Engineering +10

Experimental determination of threshold voltage shifts due to quantum mechanical effects in MOS electron and hole inversion layers

G. Chindalore, S.A. Hareland, S. Jallepalli et al. · IEEE Electron Device Letters · 1997 · 79 citations

Device Modeling, Device Simulator, Electrical Engineering +14