Pramod Kumar Patel

A 14nm logic technology featuring 2<sup>nd</sup>-generation FinFET, air-gapped interconnects, self-aligned double patterning and a 0.0588 µm<sup>2</sup> SRAM cell size

S. Natarajan, M. Agostinelli, Sheikh A. Akbar et al. · 2014 · 521 citations

-Generation Finfet, Rectangular Fins, Engineering +16

6.6+ GHz Low Vmin, read and half select disturb-free 1.2 Mb SRAM

R. Houle, Kevin Batson, D. Rodko et al. · 2007 · 59 citations

Low-power Electronics, Electrical Engineering, Ghz Low Vmin +12

Reliable high-yield CNTFET-based 9T SRAM operating near threshold voltage region

Pramod Kumar Patel, M.M. Malik, Tarun Kumar Gupta · Journal of Computational Electronics · 2018 · 35 citations

Low-power Electronics, Electrical Engineering, Engineering +6

A 5.6GHz 64kB Dual-Read Data Cache for the POWER6TM Processor

John D. Davis, D. Plass, P. Bunce et al. · 2006 · 20 citations

Engineering, Vlsi Design, Emerging Memory Technology +18

Performance evaluation of single-ended disturb-free CNTFET-based multi-Vt SRAM

Pramod Kumar Patel, M.M. Malik, Tarun Kumar Gupta · Microelectronics Journal · 2019 · 20 citations