D. Plass

Design of the Power6 Microprocessor

Joshua Friedrich, B.D. McCredie, N. James et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 2007 · 114 citations

Engineering, Vlsi Design, Computer Architecture +20

Design and implementation of the POWER5™ microprocessor

J. Clabes, Joshua Friedrich, M. Sweet et al. · 2004 · 114 citations

Engineering, Vlsi Design, Energy Efficiency +16

6.6+ GHz Low Vmin, read and half select disturb-free 1.2 Mb SRAM

R. Houle, Kevin Batson, D. Rodko et al. · 2007 · 59 citations

Low-power Electronics, Electrical Engineering, Ghz Low Vmin +12

The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking

Eric Fluhr, Steve Baumgartner, D. Boerstler et al. · IEEE Journal of Solid-State Circuits · 2014 · 49 citations

Engineering, Core Throughput, Energy Efficiency +19

5.1 POWER8<sup>TM</sup>: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth

Eric Fluhr, Joshua Friedrich, Daniel Dreps et al. · 2014 · 48 citations

Engineering, Vlsi Design, Computer Architecture +16