F. Bénistant

Optimization and Benchmarking FinFETs and GAA Nanosheet Architectures at 3-nm Technology Node: Impact of Unique Boosters

Krishna K. Bhuwalka, Hao Wu, Wenbo Zhao et al. · IEEE Transactions on Electron Devices · 2022 · 48 citations

Engineering, Electrical Engineering, Microelectronics +16

Strain relaxation in transistor channels with embedded epitaxial silicon germanium source/drain

J. P. Liu, K. Li, Shesh Mani Pandey et al. · Applied Physics Letters · 2008 · 36 citations

Engineering, Electrical Engineering, Materials Science +11

Comprehensive model of damage accumulation in silicon

K. R. C. Mok, F. Bénistant, M. Jaraı́z et al. · Journal of Applied Physics · 2008 · 23 citations

Engineering, Materials Engineering, Materials Science +17

A novel CMOS compatible L-shaped impact-ionization MOS (LI-MOS) transistor

Eng-Huat Toh, Grace Huiqi Wang, Guo‐Qiang Lo et al. · 2006 · 21 citations

Engineering, Electrical Engineering, Electronic Materials +16

Novel stress-free Keep Out Zone process development for via middle TSV in 20nm planar CMOS technology

Mohamed A. Rabie, C.S. Premachandran, Rakesh Ranjan et al. · 2014 · 16 citations

Engineering, Electrical Engineering, Microelectronics +14