A. Alian

A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP Capacitors

Guy Brammertz, A. Alian, Dennis Lin et al. · IEEE Transactions on Electron Devices · 2011 · 95 citations

Engineering, Electrical Engineering, Materials Science +17

Border Traps in Ge/III–V Channel Devices: Analysis and Reliability Aspects

Eddy Simoen, Dennis Lin, A. Alian et al. · IEEE Transactions on Device and Materials Reliability · 2013 · 79 citations

Engineering, Electrical Engineering, Materials Science +17

CMOS-compatible GaN-based devices on 200mm-Si for RF applications: Integration and Performance

Uthayasankaran Peralagu, A. Alian, V. Putcha et al. · 2019 · 77 citations

Engineering, Electrical Engineering, Materials Science +17

Advancing CMOS beyond the Si roadmap with Ge and III/V devices

Marc Heyns, A. Alian, Guy Brammertz et al. · 2011 · 60 citations

Engineering, Electrical Engineering, Materials Science +16

Low interfacial trap density and sub-nm equivalent oxide thickness in In0.53Ga0.47As (001) metal-oxide-semiconductor devices using molecular beam deposited HfO2/Al2O3 as gate dielectrics

Li‐Kang Chu, Clément Merckling, A. Alian et al. · Applied Physics Letters · 2011 · 54 citations

Engineering, Materials Engineering, Materials Science +17