A. Alian

A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP Capacitors

Guy Brammertz, A. Alian, Dennis Lin et al. · IEEE Transactions on Electron Devices · 2011 · 95 citations

Device Modeling, Border Trap Model, Electrical Engineering +14

Border Traps in Ge/III–V Channel Devices: Analysis and Reliability Aspects

Eddy Simoen, Dennis Lin, A. Alian et al. · IEEE Transactions on Device and Materials Reliability · 2013 · 79 citations

Electrical Engineering, Elastic Tunneling Model, Engineering +11

Advancing CMOS beyond the Si roadmap with Ge and III/V devices

Marc Heyns, A. Alian, Guy Brammertz et al. · 2011 · 60 citations

Wide-bandgap Semiconductor, Engineering, Vlsi Design +18

Low interfacial trap density and sub-nm equivalent oxide thickness in In0.53Ga0.47As (001) metal-oxide-semiconductor devices using molecular beam deposited HfO2/Al2O3 as gate dielectrics

Li‐Kang Chu, Clément Merckling, A. Alian et al. · Applied Physics Letters · 2011 · 54 citations

Wide-bandgap Semiconductor, Engineering, Semiconductor Device +18

An Investigation on Border Traps in III–V MOSFETs With an In_0.53Ga_0.47As Channel

Zhigang Ji, Xiong Zhang, J. Franco et al. · IEEE Transactions on Electron Devices · 2015 · 51 citations · Full text

Semiconductors, Semiconductor Technology, Electrical Engineering +10