Masahiro Sunohara

Current Status of Research and Development for Three-Dimensional Chip Stack Technology

Kenji Takahashi, Hiroshi Terao, Yoshihiro TOMITA et al. · Japanese Journal of Applied Physics · 2001 · 174 citations

Engineering, Computer Architecture, Integrated Circuits +21

Silicon interposer with TSVs (Through Silicon Vias) and fine multilayer wiring

Masahiro Sunohara, Takashi Kurihara, Mitsutoshi Higashi · 2008 · 153 citations

Engineering, Silicon Vias, Silicon On Insulator +18

A Silicon interposer BGA package with Cu-filled TSV and multi-layer Cu-plating interconnect

K. Kumagai, Yuko Yoneda, Hitoshi Izumino et al. · 2008 · 85 citations

Studies on electrical performance and thermal stress of a silicon interposer with TSVs

Masahiro Sunohara, Hideaki Sakaguchi, Akihito Takano et al. · 2010 · 51 citations

Engineering, Electrical Performance, Wafer Scale Processing +17

Development of advanced 3D chip stacking technology with ultra-fine interconnection

Kenji Takahashi, M. Hoshino, H. Yonemura et al. · 2002 · 44 citations

3D Ic Architecture, Wafer Scale Processing, Engineering +15